Pentagon unveils Microelectronics Commons hubs

DARPA's Diverse Accessible Heterogeneous Integration effort is developing transistor-scale heterogeneous integration processes seeking to combine advanced compound semiconductor wafers with CMOS technology. Pictured here is a DAHI wafer. (Northrop Grumman)

The US Department of Defense (DoD) has officially announced the eight new research and development (R&D) hubs in the United States that will make up the department's new Microelectronics (ME) Commons.

The ME Commons initiative, funded through the Creating Helpful Incentives to Produce Semiconductors (CHIPS) Act of 2002, is designed to “get the most cutting-edge microchips into systems our troops use every day ... [while] reducing our reliance on foreign components, keeping us safe from the risks of supply chain disruption”, Deputy Defense Secretary Kathleen Hicks said during a 20 September briefing at the Pentagon.

Managed by the Strategic & Spectrum Missions Advanced Resilient Trusted Systems (S2MARTS), Other Transaction Authority (OTA), and Naval Surface Warfare Center (NSWC), the ME Commons will interconnect the series of regional R&D hubs focusing on different sectors of ME capability development.

The Northeast Regional Defense Technology Hub of the ME Commons will be launched at the State University of New York Polytechnic Institute, New York, and the Northeast Microelectronics Coalition Hub will be headquartered at the Massachusetts Technology Collaborative, according to Hicks.

The Ohio-based Midwest Microelectronics Consortium will anchor one of two hubs in the Midwest region, along with Indiana's Applied Research Institute, she said. The institute will serve as the main location for the Silicon Crossroads Microelectronics Commons Hub, Hicks added.

Two hubs in California and one in Arizona will constitute the ME Commons' presence in the Southwest region of the US. The University of Southern California will spearhead the California Defense Ready Electronics and Microdevices Superhub, Hicks said.